Circuits and Systems (CAS-Oulu)

Professor Juha Kostamovaara and Professor Timo Rahkonen,
Electronics Laboratory, Department of Electrical Engineering, University of Oulu

juha.kostamovaara(at)ee.oulu.fi, timo.rahkonen(at)ee.oulu.fi

http://www.infotech.oulu.fi/cas

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Background and Mission

The Circuits and Systems group consists of about 25 researchers working at the Electronics Laboratory of the Department of Electrical Engineering at the University of Oulu. Its main activity is in the field of electronic and optoelectronic circuit and system design. The primary implementations are based on CMOS and BiCMOS IC technologies. The main interest of the group is devoted to certain novel devices, circuit topologies and functional units, although the group is also interested in applications, especially in the field of electronic/optoelectronic measurements.

The main research fields are:

• time-to-digital converters and timing circuits
• generation and detection of powerful and high-speed electrical and optical pulses/transients, breakdown phenomena in semiconductors in general
• development of pulsed time-of-flight laser range finding and Raman spectrometer technologies, especially for industrial applications
• radio telecommunications including linearization of power amplifiers, AD/DA conversion and baseband blocks, frequency synthesis

The group has created a well-functioning partnership with some international research units working in the same or in a complementary field. The group is mainly funded by the Academy of Finland, Tekes and industry.

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Scientific Progress

In the following, some details and results of the work of the group are given in selected important research fields.

Time-to-Digital Converters and Timing Circuits

A 7-Channel Time-to-Digital Converter CMOS Chip Based on Multi-Phase Delay Line Interpolation

A 7-channel time-to-digital converter (TDC) circuit has been developed with 0.35 µm CMOS technology. The multiple measurement channels make it possible to detect the time intervals between the start-pulse up to three successive stop-pulses. In addition, the TDC can solve the pulse widths or rise times of the stop-pulses at the same time. This diversifies its use, especially in pulsed time-of-flight laser ranging where the stop-pulse shape information can be used to compensate for the timing walk error induced by varying echo amplitudes.

The time-to-digital conversion is based on a counter and stabilized delay line interpolation, which combined provides a ms-level linear dynamic range, stable ps-level LSB resolution and good temperature stability. The interpolations are made on two levels, where the first interpolation is based on successive delay elements, and the second high resolution interpolation is realized with parallel load capacitor-scaled delay lines. Several additional techniques improve the usability of the circuit. The measurement resolution (LSB size) is locked to the cycle time of the external reference crystal, which provides stable operation in different circumstances. An Arithmetic Logic Unit (ALU) calculates the final results inside the circuit, which decreases the amount of transferable data and speeds up the operation of measurement device. Built-In Self-Test (BIST) verifies the operation without external timing signals. A Serial Peripheral Interface (SPI) provides a standard and simple connection to support electronics.

The TDC circuit is presented in Figure 1. The dimensions are 2.4 mm x 3.7 mm and its power consumption with a 3.3 V supply is 85 mW. The measurement resolution and precisions are better than 10 ps for all measurement time intervals within a long dynamic range. Figure 2 shows a measurement example with the start and three successive stop-pulses created with a signal generator. The same time intervals were measured 100 000 times and the average values, µ, and standard deviation σ values were calculated. The first diagram shows the time intervals between the start and stop pulses. The second diagram shows the stop-pulse widths and the last diagram depicts the operation in the rise time measurement mode.

 

Figure 1. Photograph of the 7-channel CMOS TDC.

 

Figure 2. Measurement results with the start and 3 successive stop pulses.

 

 

A Sub-ps-level Resolution CMOS Time-to-Digital Converter Based on Time Domain Successive Approximation Interpolation

A time-to-digital converter (TDC) with sub-ps resolution and a ms-level dynamic range is under development. A digital counter with a ms-level dynamic range keeps track of the full clock cycles between the start and stop timing signals, and the interpolators resolve the fractional parts of the clock cycle between the arrival moment of the timing signals and the edges of the clock signal. The sub-ps resolution is achieved with interpolation based on a cyclic time domain successive approximation (CTDSA) method, utilizing a pair of digital-to-time converters (DTC) with sub-ps level delay adjustment resolution, see Figure 3.

The research work focuses on improving the dynamic range and linearity of the DTC needed in the interpolation method. If the DTC can reach a ns-level linear dynamic range, the interpolation can be performed in one stage, which simplifies the design of the TDC. A stable, low jitter ~200 MHz clock oscillator could be used as the reference clock.

The DTC is composed of an adjustable current switch, a load capacitor matrix, and a comparator. The propagation delay difference between the DTCs, defining the resolution of the TDC, is implemented by digitally controlling the unit load capacitors, and also by digitally controlling the current of the current switches discharging the load capacitances. The comparator detects when the voltage of the capacitor matrix has been discharged below a reference voltage, and then produces the output signal after the desired delay.

According to the simulations, a linear dynamic range of 12-13 bits, i.e. several ns, with sub-ps resolution can be achieved for the DTC. This means, that an interpolator with a linear dynamic range of 5 ns can be combined with a 200 MHz counter  to implement an integrated CMOS TDC with sub-ps level resolution and a ms-level dynamic range.

 

Figure 3. Digital-to-time converter (DTC) for TDC.

 

 

Oscillator Instability Effects in Time Interval Measurement

Resolution of state-of-the-art time-to-digital converters is already close to 1 ps, which means that clock induced instability is becoming a significant error source when time intervals are measured. For this reason, the relationship between clock instabilities and time interval jitter is studied.

Typically, clock instability is defined in the frequency domain by phase noise measurements, or in the time domain by Allan variance. Oscillator noise is usually modeled with power-law noise processes that have a PSD proportional to 1/f^β, where β ≥ 0. These noise processes with different β-values result in different behavior of the time interval jitter. Time interval jitter can be approximated from phase noise data as follows:

 

Some of the noise processes result in undefined time interval jitter as the integral diverges to infinity, which makes it difficult to evaluate the clock oscillators’ performance in time interval measurement applications. This is the case for noise processes with β ≥ 3. These noise processes usually affect the performance of a TDC only at very long time intervals and they build up so slowly that the accuracy of the TDC seems to slowly drift.

Using a time-to-digital converter capable of measuring time intervals with a 1 ps precision and 10 ms in range, different oscillators were measured to analyze how the time interval jitter builds up for different kinds of noise processes. For example, Figure 4 shows a phase noise plot of a PLL-based frequency synthesizer with very high spurious tones due to the reference oscillator.

 

Figure 4. Phase noise of a 200 MHz PLL-based frequency synthesizer.

 

The time interval jitter due to phase noise was then calculated and measured with the TDC. The results are shown in Figure 5. On short time intervals, the jitter is dominated by the spurs, which causes the jitter to be periodic. As the phase noise increases, the periodic jitter diminishes, and the jitter on longer time intervals is mainly determined by the noise inside the loop bandwidth of the PLL. At close-in offset frequencies, the phase noise starts to increase yet again, but having no significant impact on the jitter, even with long time intervals of 10 ms. The frequency synthesizer would be insufficient for use as a reference oscillator for a TDC since the time interval jitter is more than 100 ps, with a 100 μs time interval. A reference oscillator for a TDC capable of measuring time intervals up to a millisecond range should have a flat white noise floor down to very small frequency offset, which practically rules out conventional PLL-based frequency synthesizers and ring oscillators, for example.

 

Figure 5. Measured and approximated time interval jitter of the 200 MHz clock.

 

 

An Integrated Receiver Channel for a Compact Laser Scanner

An integrated receiver channel has been developed for a pulsed TOF laser radar which could be used together with a multi-channel TDC in a compact automotive LIDAR sensor. The receiver channel is designed to meet the requirements of the traffic application, such as a very wide dynamic range of the input signal, accurate timing detection and the possibility to detect several successive pulses that may occur due to rain, for example. The receiver channel operates on the leading edge timing discrimination principle, and the input amplitude-dependent timing error is compensated for by measuring the pulse length with a multi-channel TDC and knowing the relation between the error and pulse length.

The aim of the project was to develop the general purpose, low cost, miniature scanning LIDAR sensor shown in Figure 6 to serve numerous applications in the automotive market. The technical objectives to be met in the novel laser scanner, based on the LIDAR method, were supposed to be met with using novel omnidirectional optics that allow a large field of view (250^o), utilizing micro-mechanical mirrors (MEMS) instead of bulky and expensive macro-mechanical scanning and by developing high performance integrated channel and multi-channel TDC electronics to enable highly precise measurement.

 

Figure 6. A scanning laser radar.

 

The input dynamic range of the detected laser echo can vary over a dynamic range of 1 : 100 000 in automotive application. In order to cover this wide dynamic range accurately, leading edge timing discrimination has been used in the receiver with a time-domain walk compensation method. The receiver channel measures not only the time occurrence of the crossover of the timing pulse with respect to a certain reference level, but also the pulse length, and this information is used to compensate for the amplitude dependent timing detection error. The compensation technique is operative also when the signal exceeds the dynamic range of the receiver channel, and thus a very wide dynamic range can be measured.

Another notable design issue that must be taken care of in a traffic application is the possibility of several successive echoes due to the front window or bad weather conditions, for example. Because of this, the receiver channel was designed to be able to detect several successive pulses, and the TDC includes several independent measurement channels in order to be able to measure simultaneously the position of multiple echoes as result of a single laser shot.

The integrated receiver channel is fabricated in a 0.35 μm SiGe BiCMOS process. The preliminary measurement results are performed using a receiver channel with a multichannel TDC (see above). The trans impedance and bandwidth of the receiver channel were 64 kΩ and 300 MHz, respectively. The input referred rms noise current was about 100 nA_rms .

The measured walk error, without compensation, was about 2.2 ns, which corresponds to about 32 cm in distance. The walk error was compensated for by means of the compensation curve shown in Figure 7 which shows the behavior of the walk as a function of the measured pulse length through the input signal range of 1 μA to 22 mA. The residual walk error for random input amplitudes over this amplitude range was less than ±20 ps. The single-shot precision was measured to be about 144 ps (±10 mm) at a SNR of 10. The best achievable single-shot measurement was about 14 ps.

During coming year, system level measurements will be made for a scanning laser radar including a rotating mirror and omnidirectional lens. 

 

Figure 7. Compensation curve for walk compensation.

 

Table 1. Preliminary measurements, performance of the receiver channel.

 

A Single Photon Avalanche Diode (SPAD) for Raman Spectroscopy

A time-gated single photon avalanche diode (SPAD) has been designed and fabricated with standard high voltage 0.35 µm CMOS technology for Raman spectroscopy. The sub-ns time gating window is used to suppress the fluorescence background typical of Raman studies. The dark count rate of the SPAD is also minimized by means of the time-gating in order to maximize the signal-to-noise ratio of the Raman signal.

It seems to be possible to suppress the fluorescence background to a great extent if intensive short laser pulses are used to illuminate the sample instead of CW radiation, and by recording the sample response only during these short pulses. The suppression is due to the fact that Raman scattering is introduced immediately after the collision between the photons and the sample material, unlike fluorescence, which is emitted after a delay characteristic to the sample. Thus, by “time-gating” the measurement for only the period of the laser pulse, most of the fluorescence is blocked out from the recorded spectrum.

The block diagram of the Raman spectrometer used is shown in Figure 8. The material to be measured is excited by means of a pulsed laser, emitting short 300 ps (FWHM) and spectrally narrow (~0.2 nm) pulses at an average power level of a few mW.

 

Figure 8. Block diagram and time gating principle of the proposed Raman spectrometer.

 

Raman spectrometer measurements were performed to test the efficiency of fluorescence suppression using the suggested time-gated SPAD principle. The test setup was similar to that shown in Figure 8, and the spectrograph itself consisted of a step motor to move the time-gated SPAD with small steps to cover the full Raman shift range. Figure 9 shows the Raman spectra measured for a sample of olive oil a) without the time gate window and b) with a 300 ps time gate window.

 

Figure 9. Raman spectrum of a sample of olive oil a) without the time gate window and b) with a 300 ps time gate window.

 

In addition, a time-gated SPAD matrix was designed for the recording of the complete Raman spectrum. The matrix has to be capable of measuring the number and the arrival time information of photons at a rate of 100 kHz and with a precision of up to tens of picoseconds. The readout logic of the IC is designed so that the photon counting is as continuous as possible. The width of the detector array in the spectral direction should be wide enough to cover the whole Raman shift range of the sample under study. A time-gated SPAD matrix of 128x8 elements is designed for that purpose and will be realized using 0.35 μm HVCMOS technology. The size of the SPAD matrix and the whole IC are 4100 μm x 343 μm and 4300 μm x 2950 μm, respectively. The fill factor of the designed SPAD matrix is 23%. The picture of the layout of the IC is shown in Figure 10.

 

Figure 10. The layout of the SPAD matrix of 128x8 elements.

 

Generation of Electrical/Optical Transients

High-energy Picosecond Laser Diode Pulse Generation for a Single-Photon Avalanche Diode (SPAD) Rangefinder Application

A previously proposed new type of gain-switched laser diode and corresponding avalanche transistor current pulser were further optimized, this time outputting 40 W, 100 ps laser pulses (Figure 11) in a fundamental transverse mode. These laser pulses are especially compatible with a SPAD detector due to good matching between SPAD resolution (<100 ps) and the width of this optical pulse. CMOS SPAD detectors have also been developed in the CAS group.

 

Figure 11. Measured driving current and optical output pulses of the suggested DH bulk laser diode based on “enhanced gain-switching”.

 

Pulsed time-of-flight laser range-finding demonstrations were given with the developed laser diode and a SPAD detector. The results show sub-cm distance measurement precision with a black target at 68 m in a measurement time of ~100 ms (Figure 12).

 

Figure 12. Distance measurement precision results with three measurement times. Black target at 68 m.

 

The measurement result of Figure 13 (a) shows that half of the sent laser pulses caused an avalanche detection pulse in the SPAD with a target distance of 68 m. One way to decrease the measurement time is to reduce the laser diode stripe width (now 120 microns). This will reduce the current pulse requirement enabling the use of a FET current pulser with a higher pulsing frequency. The measurement time will therefore be faster, even though single laser pulse amplitudes and pulse detection fractions will be smaller. This will also reduce the susceptibility to walk error caused by many photons partaking in the creation of SPAD avalanche current (Figure 14).

 

Figure 13. (a) Measured fraction of laser signal detections by SPAD as a function of distance with a black planar target. (b) Measured and simulated optical echo amplitude.

 

Figure 14. Uncompensated time walk of SPAD detections.

 

High-Speed Avalanching BJTs as High-Current Drivers for LDs and UV LEDs, and as High-Power Pulsed Emitters for Sub-THz Imaging

Currently a principle problem in developing a unique (high-voltage, picosecond range) GaAs avalanche switch lies in premature surface breakdown, which does not allow the device to be biased close to the breakdown voltage in the bulk. At first glance, this limitation is of a fundamental character, as the premature surface breakdown in the n⁺-p-n₀-n⁺ GaAs avalanching BJT (ABJT), with n⁺ emitter on the top, is unavoidable due to negatively-beveled mesa contour of p-base-n₀ collector junction.   We have found, however, a new mechanism stabilizing the surface current on a reasonably low level due to intrinsic surface traps, thus permitting biasing close to the bulk breakdown voltage to be used. This extremely favorable and important phenomenon, termed “avalanche-assisted carrier trapping”, consists of electron trapping on the deep surface acceptors, whose negative charge broadens the space-charge region on the surface, thus reducing the peak of the electric field and preventing sharp growth in the surface current.

The above mentioned above finding of how an intrinsic acceptor traps on the surface, providing a means for reliable operation of  avalanching GaAs BJTs, we have lately suggested a new concept for passivation of a mesa-surface using a specially formed negative surface charge. We realized this idea in an experiment using simple deposition of massive chalcogenide glass on the mesa-surface of a GaAs ABJT.

For nanosecond/sub-nanosecond pulse durations, GaAs-based ABJTs are apparently the best active high-voltage/high-speed switches, but their technology has been thus far under development, and commercialization of this device still requires significant investments and time. Si ABJT’s have been most frequently used for nanosecond pumping of pulsed laser diodes, but Si avalanche transistors with a switching time less than 2 ns are absent. What is very surprising is the fact that a comprehensive physical description of Si ABJT operation at high current densities was absent, and the first reliable results we have obtained several years ago using 1-D and 2-D approaches. Very lately, we have also found the drastic effect of 3-D phenomena on the device operation, especially in short-pulsing mode. Thus, the correct physical approach to designing Si ABJTs has appeared only within the last couple of years. We are currently concentrating on optimal designing of Si ABJTs (semiconductor structures and chip geometry) operating in the range 0.3-2 ns with as high currents and voltages as possible. The first, preliminary “release” of our modeling predicts a possibility of designing ~4 A / 1 ns Si transistors operating at repetition rate up to ~10 MHz, and this impressive (and apparently correct) prediction is only the first step in optimal development of a new family of high-speed Si avalanche BJTs covering the whole range of required in applications trade-offs between high current amplitude and small pulse duration. 

Another very promising (and apparently most important) application for the avalanche switching in GaAs BJT is the generation of pulsed broad-band terahertz emission. Periodical nucleation and annihilation of ultra-narrow, powerfully ionizing “collapsing” domains is believed to cause the THz emission observed in our experiments. The task of design, development and investigation of high-power pulsed (ns/sub-ns) emitters for a new generation of active sub-THz imagers is very complicated and challenging, and should be divided into several directions and stages. Very lately we have undertaken an attempt to realize “collapsing” field domains (causing sub-THz radiation) not in a GaAs bipolar transistor structure, but in an analogue of a Gunn diode with special impurity profiles, and under special pumping conditions. Modeling results are promising, and we plan to perform their experimental verification. The main direction, however, is design and development of BJT GaAs-based structures combined with properly designed sub-THz antennas, and using as a received fast, room-temperature quasi-optical detector based on a Schottky diode. The solution of large number of the related tasks is underway, and the first laboratory examples of transmission sub-THz imaging utilizing not only transmission intensity, but also propagation delay of the pulses  across the object with temporal resolution of ~10-30 ps have been presented in invited talks and are illustrated in Figure 15.

 

Figure 15. Photo of pills (in the middle) and transmission imaging (below the pills) utilizing area, peak and plateau values of the transmitted pulse (red pulse in the lower-left corner; the black one is the current waveform across ABJT). The two top images utilized as “brightness” a propagation delay at two different levels (30% and 15% of the pulse amplitude). In the experiment, the emitting transistor was placed at one focal point of an elliptic mirror, and the Schottky detector was situated in the second focal point (see a draft in the bottom right-hand corner). The specimen was scanned in front of the detector using a motorized 2-D stage.

 

 

Circuit Analysis and Linearization Techniques

Distortion Contribution Analysis Algorithm VoHB

A general-purpose distortion contribution analysis called VoHB (Volterra on Harmonic Balance) is being developed, and in 2009 it appeared as a functional, multi-device, model-independent prototype within a AWR-Aplac’s analog simulator. During 2011, its capabilities have been further extended, and it has been verified against many test circuits with distortion contributions that have been previously hand-analyzed in the literature. An example study of the procedure of using the distortion contribution analysis in the design process was reported in the ECCTD 2011 conference.

The new capabilities of VoHB include a much improved polynomial fitting of multi-input non-linear devices: bias and small-current devices can be linearized, while active multi-input devices are characterized by a separate fitting run with perturbed input signals to break the input-output correlation. It was also discovered that the current trend of using Verilog-A descriptions for building the device models results in a rather complex device structure that is not very easy to track.

Additionally, a comparison with a time-varying Volterra analysis has been made, and our brute-force polynomial modeling has been found to be equivalent to the time-varying approach. Hence, the analysis of mixer circuits is also fully possible using 5^th-degree polynomial device models. [19]

Design Methods for Switching Amplifiers

Switch-mode RF amplifiers have been studied, especially the design method of class E amplifiers with non-linear output and feedback capacitance. A published journal paper also discussed the effects of the supply modulation, and showed that in EER applications it is usually beneficial to design the amplifier for some intermediate supply voltage, as the performance usually deteriorates more heavily at low supplies. [14]

Another very interesting study was the investigation of the input impedance of EER type switched amplifiers and linear amplifiers used in envelope tracking (ET) mode. These were reported in the InMMIC and ECCTD conferences during 2011. A supply modulated class E amplifier constitutes a very nasty input impedance, as the real part is easily gyrated to a negative resistance, the capacitive part strongly depends on the supply voltage and Miller effect, and it also has a very strong 2^nd harmonic feedback. These effects were also verified by measurements where a high-speed oscilloscope and a directional coupler were used to record the broadband signal reflected/injected from the gate. In ET amplifiers, the dominant distortion mechanism was found to be the varying amount of Miller capacitance, as the gain of the amplifier drops when it enters into slight compression as the supply begins to track the amplitude. This causes heavy AM-PM at low amplitudes, and is also very sensitive to the biasing of the amplifier: a difference of a couple of degrees in the conduction angle from class B to C may rotate the phase shift by tens of degrees. [16,17]

Related to the research on high-efficiency transmitters, the DSP of supply modulated transmitters has been enhanced. A new measuring setup and an OFDM signal generator and receiver have been developed.

Biomedical and Power Management

In cooperation with the Dept. of Physics, a study about the measurement of nerve signals of small animals was started. During 2011, an integrated multi-channel nerve signal recorder for similar applications was developed, consisting of amplifier channels with variable gain and bandwidth, and a low-power 10-bit SAR type AD converter. The AD converter part was reported at the Norchip conference in 2011.

Recently, work in the field of energy harvesting applications has also started. A simulator has been developed, that allows one to characterize photovoltaic cells and test the efficiency of different peak power point tracking algorithms.

Digital Error Correction on A/D and D/A Converters

Digital error correction in multi-bit delta-sigma AD and DA converters has been studied. In an earlier study on the originating mechanisms of spurious tones in a DWA (data weighted averaging) algorithm it was shown that in-band spurious tones are a result of  a 2^nd harmonic component in the Fourier transform of the INL (integral non-linearity) of the multi-bit DAC. These can be minimized simply by re-arranging the unit elements of the DAC. Encouraged by the success with the DWA algorithm, the same approach was extended to study the generation of spurious components in low-order delta-sigma modulators themselves. An empirical model that fits very nicely to the spurious components was published in the ECCTD conference. [15,18]

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Personnel

professors & doctors	11
doctoral students	10
others	5
total	26
person years	20

 

External Funding

Source	EUR
Academy of Finland	486 000
Ministry of Education and Culture	120 000
Tekes	49 000
domestic private	17 000
international	186 000
total	858 000

 

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Doctoral Theses

Lasanen K (2011) Integrated Analogue CMOS Circuits and Structures for Heart Rate Detectors and Other Low-voltage, Low-power Applications. Acta Universitatis Ouluensis. Technica C383.

Nissinen J (2011) Integrated CMOS Circuits for Laser Radar Transceivers. Acta Universitatis Ouluensis. Technica C389.

Nissinen I (2011) CMOS Time-to-digital Converter Structures for the Integrated Receiver of a Pulsed Time-of-flight Laser Rangefinder. Acta Universitatis Ouluensis. Technica C390.

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Selected Publications

Kurtti S & Kostamovaara J (2011) An integrated laser radar receiver channel utilizing a time-domain walk error compensation scheme. IEEE Transactions on Instrumentation and Measurement 60(1): 146-157. ¹

Ryvkin B, Avrutin EA & Kostamovaara JT (2011) Quantum well laser with an extremely large active layer width to optical confinement factor ratio for high-energy single picosecond pulse generation by gain switching. Semicond. Sci. and Tecnology 26(4), 10p. ²

Keränen P, Määttä K & Kostamovaara J (2011) A wide range time-to-digital converter with 1-ps single-shot precision. IEEE Transactions on Instrumentation and Measurement 60 (9): 3162-3172. ³

Korhonen E  & Kostamovaara J (2011) On-chip offset generator for accurate integral non-linearity testing of A/D converters and D/A-A/D converter pairs, Analog Integrated Circuits and Signal Processing 67(1): 21-29. ⁴

Duan G, Vainshtein SN & Kostamovaara JT (2011) Peculiarities of surface breakdown in GaAs bipolar junction structures. IEEE Transactions on Electron Devices 58(8): 2551-2558. ⁵

Hallman LW, Haring K, Toikkanen L, Leinonen T, Ryvkin BS & Kostamovaara JT (2012) 3 nJ, 100 ps laser pulses generated with an asymmetric waveguide laser diode for a SPAD TOF range finder application, Meas. Sci. Technol. 23: 025202, 8p. ⁶

Jansson J, Koskinen V, Mäntyniemi A & Kostamovaara J (2011) A multi-channel high precision CMOS time-to-digital converter for laserscanner based perception systems. IEEE Transactions on Instrumentation and Measurement in 2011. ⁷

Ryvkin BS, Avrutin EA & Kostamovaara JT (2011) Vertical cavity surface emitting lasers  with the active layer position detuned from standing wave antinode for picosecond pulse generation by gain switching. Journal of Applied Physics 110: 123101, 5p. ⁸

Vainshtein S, Javadyan V, Duan G, Tsendin K & Kostamovaara J (2011) Simple requirement to passivating film/GaAs interface for avalanche breakdown suppression. Annual Journal of Electronics 5(2): 109-112. ⁹

Vainshtein S, Javadyan V, Duan G, Tsendin K, Horhannisyan R & Kostamovaara J (2011) Chalcogenide glass surface passivation of a GaAs bipolar transistor for unique avalanche THz emitters and picosecond switches. Appl. Phys. Lett.; 9 Dec, MS L11-13516. ¹⁰

Duan G, Vainshtein SN & Kostamovaara JT (2011) Si avalanche transistor optimized for subnanosecond operation: physics based transient modeling. Annual Journal of Electronics 5(2): 121-123. ¹¹

Vainshtein SN, Kostamovaara JT & Yuferev VS (2011) Nanosecond pulses for sub-terahertz imaging from avalanching GaAs bipolar transistors. Pereira MF & Shulika O (Eds.) Terahertz and Mid Infrared Radiation/Generation, Detection and Applications Series: NATO Science for Peace and Security Series B: Physics and Biophysics, Chapter 26. ¹²

Yuferev V, Vainshtein S & Kostamovaara J (2011) Whether powerful terahertz oscillations are possible in a GaAs n+-n0-n+ structure? Annual Journal of Electronics 5(2): 117-120. ¹³

Hietakangas S & Rahkonen T (2011) Analysis of class E amplifier with both linear and nonlinear shunt capacitance at any duty cycle, grading coefficient and supply modulation. Springer J. Analog Integrated Circuits and Signal Processing. doi: 10.1007/s10470-011-9690-x. ¹⁴

Neitola M & Rahkonen T (2011) Predicting and avoiding spurious tones in DWA-Mismatch shaping ADC. IEEE Trans. on Circ. Syst.-II 58(6): 341-345. ¹⁵

Hietakangas S & Rahkonen T (2011) Input impedance of class E switching amplifiers. Proc. 2011 Intl Workshop of Integrated Nonlinear Microwave and Millimetre-Wave Circuits (InMMIC), April 18-19, Wien, Austria. ¹⁶

Rahkonen T, Hietakangas S & Aikio J (2011) AM-PM distortion caused by transistor’s signal-dependent input impedance. European Conference of Circuit Theory and Design (ECCTD2011), August 29-31, Linköping, Sweden. ¹⁷

Neitola M & Rahkonen T (2011) Compact tone-behavior model for delta-sigma modulators. Proc. ECCTD2011 Conference, August 29-31, Linköping, Sweden. ¹⁸

Aikio J & Rahkonen T (2011) Utilization of distortion contribution analysis. Proc. ECCTD2011 Conference, August 29-31, Linköping, Sweden, 726-729. ¹⁹

Al-Ahdab S, Mantyniemi A & Kostamovaara J (2011) Cyclic time domain successive approximation time-to-digital converter (TDC) with sub-ps-level resolution. Proceedings of the International Instrumentation and Measurement Technology Conference I2MTC 2011, May 10-12, Hangzhou, China, 4 p. ²⁰

Al-Ahdab S, Mäntyniemi A & Kostamovaara J (2011) Time-to-digital converter (TDC) with sub-ps-level resolution using current DAC and digitally controllable load capacitor. Proceeding of International Workshop on ADC Modelling, Testing and Data Converter Analysis and Design (IWADC 2011), June 30 - July 1, Orvieto, Italy, 4 p. ²¹

Nissinen I, Nissinen J, Länsman A-K, Hallman L, Kilpelä A, Kostamovaara J, Kögler M, Aikio M a& Tenhunen J (2011) A sub-ns time-gated CMOS single-photon avalanche diode detector for Raman spectroscopy. Proceedings of the ESSDERC/ESSCIRC 2011, September 12-16, Helsinki, Finland, 4 p. ²²

Zheng S, Kostamovaara J, Filiol N & Riley T (2011) A fractional delta-sigma phase-to-digital converter for digitizing a phase-locked loop. Proceedings of the 54th IEEE International Midwest Symposium on Circuits and Systems, IEEE MWSCAS 2011, August 7-10, Yonsei University, Seoul, Korea, 4 p. ²³